Part Number Hot Search : 
B2100 C548C M51A230X TE2025 5611A AM79C 24006 ER4029
Product Description
Full Text Search
 

To Download HCTS20KMSR Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 HCTS20MS
September 1995
Radiation Hardened Dual 4-Input NAND Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-183S CDIP2-T14 TOP VIEW
A1 1 B1 2 NC 3 C1 4 D1 5 Y1 6 14 VCC 13 D2 12 C2 11 NC 10 B2 9 A2 8 Y2
Features
* 3 Micron Radiation Hardened SOS CMOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 RAD (Si)/s * Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range: -55
oC
to
+125oC
GND 7
* Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * LSTTL Input Compatibility - VIL = 0.8V Max - VIH = VCC/2 Min * Input Current Levels Ii 5A at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-183S CDFP3-F14 TOP VIEW
A1 B1 NC C1 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC D2 C2 NC B2 A2 Y2
Description
The Intersil HCTS20MS is a Radiation Hardened Dual 4-Input NAND Gate. A low on any input forces the output to a High state. The HCTS20MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCTS20MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
D1 Y1 GND
Functional Diagram
An
Bn
Ordering Information
PART NUMBER HCTS20DMSR TEMPERATURE RANGE -55oC to +125oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample
Cn
Yn
PACKAGE 14 Lead SBDIP
Dn
HCTS20KMSR
-55oC to +125oC
14 Lead Ceramic Flatpack 14 Lead SBDIP An L
TRUTH TABLE INPUTS Bn X L X X H Cn X X L X H Dn X X X L H OUTPUTS Yn H H H H L
HCTS20D/ Sample HCTS20K/ Sample HCTS20HMSR
+25oC
+25oC
Sample
14 Lead Ceramic Flatpack Die
X X X H
+25oC
Die
NOTE: L = Logic Level Low, H = Logic level High, X = Don't Care
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
420
518619 3051.1
Specifications HCTS20MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . 100ns/V Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . . . . . . . 0.0V to 0.8V Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . . . . .VCC/2 to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 2.25V, IOL = 50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOL = 50A, VIL = 0.8V Output Voltage High VOH VCC = 4.5V, VIH = 2.25V, IOH = -50A, VIL = 0.8V VCC = 5.5V, VIH = 2.75V, IOH = -50A, VIL = 0.8V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 4.8 4.0 -4.8 -4.0 MAX 10 200 0.1 UNITS A A mA mA mA mA V
PARAMETER Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 -
A A -
Noise Immunity Functional Test NOTES:
FN
VCC = 4.5V, VIH = 2.25V, VIL = 0.80V (Note 2)
7, 8A, 8B
1. All voltages reference to device GND. 2. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 421
518619
Specifications HCTS20MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 TPLH VCC = 4.5V 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V. LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 MAX 18 20 20 22 UNITS ns ns ns ns
PARAMETER Input to Output
SYMBOL TPHL
(NOTES 1, 2) CONDITIONS VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation Input Capacitance SYMBOL CPD CONDITIONS VCC = 5.0V, f = 1MHz NOTES 1 1 CIN VCC = 5.0V, f = 1MHz 1 1 Output Transition Time NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TTHL TTLH VCC = 4.5V 1 1 TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN MAX 60 120 10 10 15 22 UNITS pF pF pF pF ns ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC MIN 4.0 -4.0 VCC -0.1 2 2 MAX 0.2 0.1 5 20 22 UNITS mA mA mA V V A V ns ns
PARAMETER Quiescent Current Output Current (Sink) Output Current (Source) Output Voltage Low Output Voltage High Input Leakage Current Noise Immunity Functional Test Input to Output
SYMBOL ICC IOL IOH VOL VOH IIN FN TPHL TPLH
(NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V and 5.5V, VIH = VCC/2V, VIL = 0.80V RAD, IOL = 50A VCC = 4.5V and 5.5V, VIH = VCC/2V, VIL = 0.8V , IOH = -50A VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 2.25V, VIL = 0.8V, (Note 3) VCC = 4.5V VCC = 4.5V
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input tr = tf = 3ns, VIL = GND, VIH = 3V. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 422
518619
Specifications HCTS20MS
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5
PARAMETER ICC IOL/IOH
DELTA LIMIT 3A -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate group A inspection in accordance with Method 5005 of MIL-STD-883 may be exercised. METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 ICC, IOL/H READ AND RECORD ICC, IOL/H ICC, IOL/H ICC, IOL/H
TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
Spec Number 423
518619
Specifications HCTS20MS
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 3, 6, 8, 11 1, 2, 4, 5, 7, 9, 10, 12, 13 14 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 3, 6, 8, 11 7 1, 2, 4, 5, 9, 10, 12, 13, 14 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) 7 3, 6, 8, 11 14 1, 2, 4, 5, 9, 10, 12, 13 -
NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 1K 5% for dynamic burn-in
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 3, 6, 8, 11 GROUND 7 VCC = 5V 0.5V 1, 2, 4, 5, 9, 10, 12, 13, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 424
518619
HCTS20MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
Spec Number 425
518619
HCTS20MS AC Timing Diagrams
VIH VS VIL TPLH TPHL VOH VS VOL TTLH 80% VOL 20% 80% 20% TTHL OUTPUT CL = 50pF RL = 500 INPUT CL RL
AC Load Circuit
DUT TEST POINT
VOH
OUTPUT
AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCTS 4.50 3.00 1.30 0 0 UNITS V V V V V
Spec Number 426
518619
HCTS20MS Die Characteristics
DIE DIMENSIONS: 2.20 x 2.24(mm) METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCTS20MS
A1 (1) VCC (14) D2 (13)
B1 (2)
(12) C2
(11) NC NC (3)
C1 (4)
(10) B2
D1 (5)
(9) A2
(6) Y1
(7) GND
(8) Y2
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCTS20 is TA14426A.
Spec Number 427
518619
HCTS20MS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 428


▲Up To Search▲   

 
Price & Availability of HCTS20KMSR

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X